tiny.isa.x86

1pub const Error = error{2    AmbiguousPrefix,3    InstructionTooLong,4    InvalidEncoding,5    TruncatedInstruction,6    UnsupportedAddressSize,7    UnsupportedOpcode,8    UnsupportedPrefix,9};

1pub const Access = enum(u2) {2    none = 0,3    read = 1,4    write = 2,5    read_write = 3,6};

1pub const AddressKind = enum(u3) {2    none = 0,3    base = 1,4    base_indexed = 2,5    rip_relative = 3,6    absolute = 4,7    absolute_indexed = 5,8};

1pub const Diagnostic = struct {2    candidate: Form = .{},3    prefix: [15]u8 = @splat(0),4    prefix_count: u4 = 0,5    active: bool = false,6    normalized: bool = false,78    pub fn captureForm(self: *Diagnostic, value: Form) void {9        self.* = .{10            .candidate = value,11            .active = true,12            .normalized = true,13        };14    }1516    pub fn capturePrefix(self: *Diagnostic, value: []const u8) void {17        std.debug.assert(value.len <= self.prefix.len);18        self.* = .{19            .prefix_count = @intCast(value.len),20            .active = true,21        };22        @memcpy(self.prefix[0..value.len], value);23    }2425    pub fn normalizedForm(self: Diagnostic) ?Form {26        if (!self.active or !self.normalized) return null;27        return self.candidate;28    }2930    pub fn prefixBytes(self: *const Diagnostic) []const u8 {31        return self.prefix[0..self.prefix_count];32    }33};

1pub const Extension = enum(u4) {2    zero = 0,3    one = 1,4    two = 2,5    three = 3,6    four = 4,7    five = 5,8    six = 6,9    seven = 7,10    none = 8,1112    pub fn fromRaw(value: u3) Extension {13        return @fromBackingInt(@intCast(value));14    }15};

1pub const Form = packed struct(u64) {2    prefix: Prefix = .none,3    map: Map = .one,4    opcode: u8 = 0,5    width: Width = .none,6    extension: Extension = .none,7    mode: Mode = .none,8    register_role: Role = .none,9    register_access: Access = .none,10    operand_role: Role = .none,11    operand_access: Access = .none,12    address: AddressKind = .none,13    base_role: Role = .none,14    index_role: Role = .none,15    embedded_role: Role = .none,16    embedded_access: Access = .none,17    immediate: u8 = 0,18    reserved: u13 = 0,1920    pub fn key(self: Form) FormKey {21        return @bitCast(self);22    }2324    pub fn encodedKey(self: Form) [8]u8 {25        var result: [8]u8 = undefined;26        std.mem.writeInt(u64, &result, self.key(), .little);27        return result;28    }29};

1pub const Map = enum(u1) {2    one = 0,3    two = 1,4};

1pub const Mode = enum(u3) {2    none = 0,3    memory = 1,4    displacement8 = 2,5    displacement32 = 3,6    register = 4,7};

1pub const Prefix = enum(u5) {2    none = 0,3    rex = 1,4    rex_b = 2,5    rex_r = 3,6    rex_rb = 4,7    rex_rxb = 5,8    rex_w = 6,9    rex_wb = 7,10    rex_wr = 8,11    rex_wrb = 9,12    operand16 = 10,13    operand16_cs = 11,14    operand16_rex_b = 12,15    operand16_rex_r = 13,16    operand16_rex_rb = 14,17    lock_rex = 15,18    lock_rex_b = 16,19    lock_rex_w = 17,20    repeat = 18,21    repeat_rex_b = 19,22    rex_x = 20,23    rex_xb = 21,24    rex_rx = 22,25    rex_wx = 23,26    rex_wxb = 24,27    rex_wrx = 25,28    rex_wrxb = 26,29    repeat_rex_w = 27,30    operand16_2_cs = 28,31    operand16_4_cs = 29,32    operand16_5_cs = 30,33    operand16_3_cs = 31,3435    pub fn bytes(self: Prefix) []const u8 {36        return switch (self) {37            .none => &.{},38            .rex => &.{0x40},39            .rex_b => &.{0x41},40            .rex_r => &.{0x44},41            .rex_rb => &.{0x45},42            .rex_rxb => &.{0x47},43            .rex_w => &.{0x48},44            .rex_wb => &.{0x49},45            .rex_wr => &.{0x4c},46            .rex_wrb => &.{0x4d},47            .operand16 => &.{0x66},48            .operand16_cs => &.{ 0x66, 0x2e },49            .operand16_rex_b => &.{ 0x66, 0x41 },50            .operand16_rex_r => &.{ 0x66, 0x44 },51            .operand16_rex_rb => &.{ 0x66, 0x45 },52            .lock_rex => &.{ 0xf0, 0x40 },53            .lock_rex_b => &.{ 0xf0, 0x41 },54            .lock_rex_w => &.{ 0xf0, 0x48 },55            .repeat => &.{0xf3},56            .repeat_rex_b => &.{ 0xf3, 0x41 },57            .rex_x => &.{0x42},58            .rex_xb => &.{0x43},59            .rex_rx => &.{0x46},60            .rex_wx => &.{0x4a},61            .rex_wxb => &.{0x4b},62            .rex_wrx => &.{0x4e},63            .rex_wrxb => &.{0x4f},64            .repeat_rex_w => &.{ 0xf3, 0x48 },65            .operand16_2_cs => &.{ 0x66, 0x66, 0x2e },66            .operand16_4_cs => &.{ 0x66, 0x66, 0x66, 0x66, 0x2e },67            .operand16_5_cs => &.{ 0x66, 0x66, 0x66, 0x66, 0x66, 0x2e },68            .operand16_3_cs => &.{ 0x66, 0x66, 0x66, 0x2e },69        };70    }7172    pub fn fromBytes(value: []const u8) ?Prefix {73        inline for (@typeInfo(Prefix).@"enum".field_names) |name| {74            const candidate: Prefix = @fromBackingInt(@intCast(@backingInt(@field(Prefix, name))));75            if (std.mem.eql(u8, value, candidate.bytes())) return candidate;76        }77        return null;78    }7980    pub fn rexByte(self: Prefix) u8 {81        return switch (self) {82            .rex, .lock_rex => 0x40,83            .rex_b, .operand16_rex_b, .lock_rex_b, .repeat_rex_b => 0x41,84            .rex_x => 0x42,85            .rex_xb => 0x43,86            .rex_r, .operand16_rex_r => 0x44,87            .rex_rb, .operand16_rex_rb => 0x45,88            .rex_rx => 0x46,89            .rex_rxb => 0x47,90            .rex_w, .lock_rex_w => 0x48,91            .rex_wb => 0x49,92            .rex_wx => 0x4a,93            .rex_wxb => 0x4b,94            .rex_wr => 0x4c,95            .rex_wrb => 0x4d,96            .rex_wrx => 0x4e,97            .rex_wrxb => 0x4f,98            .repeat_rex_w => 0x48,99            else => 0,100        };101    }102103    pub fn wide(self: Prefix) bool {104        return self.rexByte() & 0x08 != 0;105    }106107    pub fn hasOperand16(self: Prefix) bool {108        return switch (self) {109            .operand16,110            .operand16_cs,111            .operand16_rex_b,112            .operand16_rex_r,113            .operand16_rex_rb,114            .operand16_2_cs,115            .operand16_4_cs,116            .operand16_5_cs,117            .operand16_3_cs,118            => true,119            else => false,120        };121    }122123    pub fn repeatedOperand16(self: Prefix) bool {124        return self == .operand16_2_cs or125            self == .operand16_4_cs or126            self == .operand16_5_cs or127            self == .operand16_3_cs;128    }129130    pub fn locked(self: Prefix) bool {131        return switch (self) {132            .lock_rex, .lock_rex_b, .lock_rex_w => true,133            else => false,134        };135    }136137    pub fn repeated(self: Prefix) bool {138        return switch (self) {139            .repeat, .repeat_rex_b, .repeat_rex_w => true,140            else => false,141        };142    }143};

1pub const Role = enum(u2) {2    none = 0,3    ordinary = 1,4    rsp = 2,5    rbp = 3,6};

1pub const Width = enum(u3) {2    none = 0,3    byte = 1,4    word = 2,5    dword = 3,6    qword = 4,7    vector128 = 5,89    pub fn bytes(self: Width) u8 {10        return switch (self) {11            .none => 0,12            .byte => 1,13            .word => 2,14            .dword => 4,15            .qword => 8,16            .vector128 => 16,17        };18    }19};

1pub const Family = enum(u5) {2    move = 0,3    extend = 1,4    address = 2,5    string = 3,6    arithmetic = 4,7    logic = 5,8    unary = 6,9    shift = 7,10    multiply = 8,11    divide = 9,12    condition = 10,13    control = 11,14    stack = 12,15    swap = 13,16    carry = 14,17    nop = 15,18    boundary = 16,19    system = 17,20    vector = 18,21    exchange = 19,22    interrupt = 20,23};

1pub const Instruction = struct {2    form: x86.Form,3    operation: Operation,4    family: Family,5    bytes: u4,6    register: ?x86.Register = null,7    register_access: x86.Access = .none,8    operand: x86.Operand = .none,9    operand_access: x86.Access = .none,10    embedded: ?x86.Register = null,11    embedded_access: x86.Access = .none,12    immediate: ?x86.Immediate = null,13    relative: ?i32 = null,14    modrm_mode: ?u2 = null,15    modrm_operand: ?u4 = null,16    implicit: [implicit_registers_max]x86.RegisterAccess = @splat(.{}),17    implicit_count: u3 = 0,1819    pub fn implicitRegisters(self: *const Instruction) []const x86.RegisterAccess {20        std.debug.assert(self.implicit_count <= self.implicit.len);21        return self.implicit[0..self.implicit_count];22    }23};

1pub const Operation = enum(u8) {2    add = 0,3    and_ = 1,4    bswap = 2,5    call = 3,6    cmc = 4,7    cmovae = 5,8    cmove = 6,9    cmovne = 7,10    cmp = 8,11    dec = 9,12    div = 10,13    hlt = 11,14    imul = 12,15    inc = 13,16    ja = 14,17    jae = 15,18    jb = 16,19    jbe = 17,20    je = 18,21    jmp = 19,22    jne = 20,23    lea = 21,24    mov = 22,25    movs = 23,26    movsx = 24,27    movzx = 25,28    mul = 26,29    nop = 27,30    not_ = 28,31    or_ = 29,32    out = 30,33    pop = 31,34    push = 32,35    ret = 33,36    rol = 34,37    sbb = 35,38    seta = 36,39    setae = 37,40    setb = 38,41    setbe = 39,42    sete = 40,43    setne = 41,44    shl = 42,45    shr = 43,46    stos = 44,47    sub = 45,48    test_ = 46,49    ud2 = 47,50    xor_ = 48,51    adc = 49,52    cli = 50,53    cmova = 51,54    cmovb = 52,55    cmpxchg = 53,56    cpuid = 54,57    idiv = 55,58    int_ = 56,59    movdqu = 57,60    movups = 58,61    neg = 59,62    pshufd = 60,63    pushf = 61,64    rdmsr = 62,65    ror = 63,66    sar = 64,67    sti = 65,68    wrmsr = 66,69    xchg = 67,70    seto = 68,71    jl = 69,72    jge = 70,73    jle = 71,74    jg = 72,75    setl = 73,76    setge = 74,77    setle = 75,78    setg = 76,7980    pub fn family(self: Operation) Family {81        return switch (self) {82            .mov => .move,83            .movsx, .movzx => .extend,84            .lea => .address,85            .movs, .stos => .string,86            .add, .adc, .cmp, .sbb, .sub => .arithmetic,87            .and_, .or_, .test_, .xor_ => .logic,88            .dec, .inc, .neg, .not_ => .unary,89            .rol, .ror, .sar, .shl, .shr => .shift,90            .imul, .mul => .multiply,91            .div, .idiv => .divide,92            .cmova,93            .cmovae,94            .cmovb,95            .cmove,96            .cmovne,97            .ja,98            .jae,99            .jb,100            .jbe,101            .je,102            .jne,103            .seta,104            .setae,105            .setb,106            .setbe,107            .sete,108            .setne,109            .seto,110            .jl,111            .jge,112            .jle,113            .jg,114            .setl,115            .setge,116            .setle,117            .setg,118            => .condition,119            .call, .jmp, .ret => .control,120            .pop, .push, .pushf => .stack,121            .bswap => .swap,122            .cmc => .carry,123            .nop => .nop,124            .hlt, .out, .ud2 => .boundary,125            .cli, .cpuid, .rdmsr, .sti, .wrmsr => .system,126            .movdqu, .movups, .pshufd => .vector,127            .cmpxchg, .xchg => .exchange,128            .int_ => .interrupt,129        };130    }131};

1pub const Immediate = struct {2    value: u64,3    encoded_bytes: u4,4    extension: ImmediateExtension,56    pub fn signed(self: Immediate) i64 {7        std.debug.assert(std.math.isPowerOfTwo(self.encoded_bytes));8        std.debug.assert(self.encoded_bytes <= 8);9        return switch (self.encoded_bytes) {10            1 => @as(i8, @bitCast(@as(u8, @truncate(self.value)))),11            2 => @as(i16, @bitCast(@as(u16, @truncate(self.value)))),12            4 => @as(i32, @bitCast(@as(u32, @truncate(self.value)))),13            8 => @bitCast(self.value),14            else => unreachable,15        };16    }17};

1pub const ImmediateExtension = enum(u1) {2    none = 0,3    sign = 1,4};

1pub const Memory = struct {2    kind: x86.AddressKind,3    width: x86.Width = .none,4    base: ?Register = null,5    index: ?Register = null,6    scale: Scale = .one,7    displacement: i32 = 0,8    segment: Segment = .none,9};

1pub const Operand = union(enum) {2    none,3    register: Register,4    memory: Memory,5};

1pub const Register = struct {2    bank: RegisterBank = .gpr,3    number: u4 = 0,4    lane: RegisterLane = .qword,56    pub fn role(self: Register) x86.Role {7        if (self.bank == .vector or self.lane == .high8) return .ordinary;8        return switch (self.number) {9            4 => .rsp,10            5 => .rbp,11            else => .ordinary,12        };13    }14};

1pub const RegisterAccess = struct {2    register: Register = .{},3    access: x86.Access = .none,4};

1pub const RegisterBank = enum(u1) {2    gpr = 0,3    vector = 1,4};

1pub const RegisterLane = enum(u3) {2    low8 = 0,3    high8 = 1,4    word = 2,5    dword = 3,6    qword = 4,7    vector128 = 5,89    pub fn bytes(self: RegisterLane) u8 {10        return switch (self) {11            .low8, .high8 => 1,12            .word => 2,13            .dword => 4,14            .qword => 8,15            .vector128 => 16,16        };17    }18};

1pub const Scale = enum(u2) {2    one = 0,3    two = 1,4    four = 2,5    eight = 3,67    pub fn factor(self: Scale) u4 {8        return @as(u4, 1) << @backingInt(self);9    }10};

1pub const Segment = enum(u3) {2    none = 0,3    es = 1,4    cs = 2,5    ss = 3,6    ds = 4,7    fs = 5,8    gs = 6,910    pub fn prefixByte(self: Segment) u8 {11        return switch (self) {12            .none => 0,13            .es => 0x26,14            .cs => 0x2e,15            .ss => 0x36,16            .ds => 0x3e,17            .fs => 0x64,18            .gs => 0x65,19        };20    }21};

1pub fn decode(code: []const u8) Error!x86.Instruction {2    var diagnostic: x86.Diagnostic = .{};3    return decodeWithDiagnostic(code, &diagnostic);4}

1pub fn decodeWithDiagnostic(2    code: []const u8,3    diagnostic: *x86.Diagnostic,4) Error!x86.Instruction {5    diagnostic.* = .{};6    var cursor: usize = 0;7    const prefix = try parsePrefix(code, &cursor, diagnostic);8    const first = try takeByte(code, &cursor);9    const map: x86.Map = if (first == 0x0f) .two else .one;10    const opcode = if (map == .two) try takeByte(code, &cursor) else first;11    const instruction_encoding = encoding(map, opcode) orelse {12        const candidate = x86.Form{ .prefix = prefix.form, .map = map, .opcode = opcode };13        diagnostic.captureForm(candidate);14        return error.UnsupportedOpcode;15    };16    var modrm = if (instruction_encoding.modrm)17        try parseModRm(code, &cursor, prefix)18    else19        null;20    var form = createForm(prefix, map, opcode, instruction_encoding, modrm);21    const operation = operationFor(prefix, map, opcode, modrm) orelse {22        diagnostic.captureForm(form);23        return error.UnsupportedOpcode;24    };25    if (modrm) |*value| {26        parseDisplacement(code, &cursor, value) catch |failure| {27            diagnostic.captureForm(form);28            return failure;29        };30    }31    const payload = parsePayload(code, &cursor, prefix, map, opcode, modrm) catch |failure| {32        if (!(map == .one and opcode == 0xcd)) diagnostic.captureForm(form);33        return failure;34    };35    if (map == .one and opcode == 0xcd) {36        form.immediate = @truncate(payload.immediate.?.value);37    }38    if (cursor > 15) return error.InstructionTooLong;39    var result = createInstruction(form, operation, cursor, prefix, modrm, payload);40    addImplicitOperands(&result, prefix);41    return result;42}

1pub const FormKey = u64;

1pub fn modeled(value: Form) bool {2    if (value.reserved != 0) return false;3    return switch (value.map) {4        .one => modeledOne(value.opcode),5        .two => modeledTwo(value.opcode),6    };7}

1pub const implicit_registers_max: usize = 4;

1pub const x86 = @import("x86/root.zig");

1const decode_owner = @import("decode.zig");2const form = @import("form.zig");3const instruction = @import("instruction.zig");4const operand = @import("operand.zig");56pub const Access = form.Access;7pub const AddressKind = form.AddressKind;8pub const Diagnostic = form.Diagnostic;9pub const Extension = form.Extension;10pub const Form = form.Form;11pub const FormKey = form.FormKey;12pub const Map = form.Map;13pub const Mode = form.Mode;14pub const Prefix = form.Prefix;15pub const Role = form.Role;16pub const Width = form.Width;17pub const formModeled = form.modeled;1819pub const Family = instruction.Family;20pub const Instruction = instruction.Instruction;21pub const Operation = instruction.Operation;22pub const implicit_registers_max = instruction.implicit_registers_max;2324pub const Immediate = operand.Immediate;25pub const ImmediateExtension = operand.ImmediateExtension;26pub const Memory = operand.Memory;27pub const Operand = operand.Operand;28pub const Register = operand.Register;29pub const RegisterAccess = operand.RegisterAccess;30pub const RegisterBank = operand.RegisterBank;31pub const RegisterLane = operand.RegisterLane;32pub const Scale = operand.Scale;33pub const Segment = operand.Segment;3435pub const DecodeError = decode_owner.Error;36pub const decode = decode_owner.decode;37pub const decodeWithDiagnostic = decode_owner.decodeWithDiagnostic;